AND, OR, NOT, NAND, NOR, XOR — The Building Blocks of Every Digital Circuit
When I first started learning about computer hardware, I assumed the inner workings of a CPU were impossibly complex. What I discovered instead was that every single digital operation — from adding two numbers to rendering a video game frame — is built from a handful of simple binary logic gates. There are exactly seven fundamental gates, and once you understand how each one transforms 1s and 0s, you can start to see how entire processors are constructed.
In this guide I'll walk through each logic gate with its truth table, circuit symbol, and a practical example of where it shows up in real hardware. By the end you'll have a mental model of how binary data flows through gates to produce every computation a computer can do.
A logic gate is an electronic circuit that takes one or more binary inputs (0 or 1, which correspond to low and high voltage) and produces a single binary output based on a fixed logical rule. The name comes from the fact that these gates "gate" the flow of electricity based on logical conditions. Every gate is implemented using transistors — typically MOSFETs in modern chips — arranged in a specific configuration. The output voltage is either pulled up to the supply voltage (logic 1) or down to ground (logic 0), depending on which transistors are switched on by the input signals.
Rule: The output is 1 only when both inputs are 1. In other words, A AND B must both be true for the result to be true.
Truth table:
A | B | Q 0 | 0 | 0 0 | 1 | 0 1 | 0 | 0 1 | 1 | 1
Where it's used: AND gates are everywhere in your CPU. One common place is in address decoding — when a memory address matches a specific pattern, AND gates help select the correct memory chip. They're also the core of the half-adder circuit we'll cover in the adder article. The Boolean expression is Q = A · B (or simply Q = AB).
Rule: The output is 1 if at least one input is 1. Only when both inputs are 0 does the output go to 0.
A | B | Q 0 | 0 | 0 0 | 1 | 1 1 | 0 | 1 1 | 1 | 1
Where it's used: OR gates handle any situation where multiple conditions can independently trigger an action. In an interrupt controller, for example, multiple devices can raise an interrupt request through an OR gate — if any device needs attention, the processor is notified. The Boolean expression is Q = A + B.
Rule: The output is the opposite of the input. A 0 becomes a 1, and a 1 becomes a 0. It's the simplest gate — just a single transistor.
A | Q 0 | 1 1 | 0
Where it's used: NOT gates are used to invert a signal. They appear inside every flip-flop (the basic memory cell we'll discuss in the register article), in clock signal conditioning, and as building blocks for NAND and NOR gates. The expression is Q = ¬A or Q = A'.
Rule: A NAND gate is an AND followed by a NOT. The output is 0 only when both inputs are 1; otherwise it's 1. NAND is a universal gate — you can build any other gate using only NAND gates.
A | B | Q 0 | 0 | 1 0 | 1 | 1 1 | 0 | 1 1 | 1 | 0
Where it's used: NAND gates are the workhorses of digital logic. NAND flash memory (used in SSDs and USB drives) is named after this gate because its memory cells are built from NAND structures. Because NAND is universal, real-world chips often use only NAND gates internally and combine them to create all other functions. The expression is Q = ¬(A · B).
Rule: A NOR gate is an OR followed by a NOT. The output is 1 only when both inputs are 0. NOR is also a universal gate.
A | B | Q 0 | 0 | 1 0 | 1 | 0 1 | 0 | 0 1 | 1 | 0
Where it's used: NOR-based SR latches are a classic way to build memory cells. NOR flash memory (faster than NAND but less dense) is another example. The expression is Q = ¬(A + B).
Rule: The output is 1 when the inputs are different. If both inputs are the same, the output is 0. XOR is the gate you reach for when you need to compare two bits.
A | B | Q 0 | 0 | 0 0 | 1 | 1 1 | 0 | 1 1 | 1 | 0
Where it's used: XOR is the star of binary addition. When you add two bits, the sum bit is exactly A XOR B. That's why every half-adder and full-adder starts with an XOR gate. XOR is also used in parity checking, error detection (CRC), and cryptography. The expression is Q = A ⊕ B.
Rule: XNOR is an XOR followed by a NOT. The output is 1 when both inputs are the same. It's the equality detector.
A | B | Q 0 | 0 | 1 0 | 1 | 0 1 | 0 | 0 1 | 1 | 1
Where it's used: XNOR gates are used in comparators. When you check whether two binary numbers are equal, you XOR their corresponding bits and then NOR all the results together. If all bit pairs match, the XNOR outputs 1 across the board. The expression is Q = ¬(A ⊕ B).
Here's the most important insight about logic gates: they compose. Individually each gate does something trivial. But when you connect them in the right arrangement, you get circuits that can add numbers (adders), store bits (latches and flip-flops), select between inputs (multiplexers), and decode instructions (decoders).
A modern CPU contains billions of transistors organized into these seven gate types. The gates are grouped into functional blocks like the ALU (Arithmetic Logic Unit), the register file, the control unit, and the cache. Every instruction your computer executes — every mouse click, every keystroke, every video frame — is ultimately a carefully timed sequence of logic gate operations.
One more thing: If you ever look at a chip design and feel overwhelmed, remember that it's just layers of the same seven gates. Start with the truth table for one gate, build up to an adder, then to an ALU, and suddenly the whole processor starts making sense.
At the silicon level, every logic gate is constructed from transistors. In CMOS technology (the dominant fabrication process), gates use complementary pairs of p-type and n-type MOSFETs. A CMOS NAND gate, for example, uses two pMOS transistors in parallel connected to Vdd and two nMOS transistors in series connected to ground. When both inputs are high, the nMOS path conducts and pulls the output to ground (logic 0). In any other input combination, at least one pMOS path connects the output to Vdd (logic 1).
The number of transistors per gate varies: NOT uses 2, NAND/NOR uses 4, AND/OR uses 6, and XOR/XNOR typically uses 8 to 12 depending on the design. All of these count as single "gate delays" in timing analysis, meaning the propagation time through one gate is roughly the same regardless of complexity.
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